1. Field of the Invention
The present invention relates to an array display apparatus in which multiple light-emitting tubes each having a fluorescent substance layer inside are aligned and a discharge is generated within these multiple light-emitting tubes, whereby the fluorescent substance layers within the light-emitting tubes are caused to emit light thereby to display an image.
2. Description of the Related Art
As a large-sized image display device which performs spontaneous light emission there has been proposed a technique in which a large number of light-emitting lines formed from glass tube, each of which has a fluorescent substance layer and the like inside, are arrayed, whereby the light emission for each part of each of the light-emitting lines is controlled thereby to display an image (refer to the Japanese Patent Laid-Open No. 61-103187).
In each of the light-emitting lines, a protective film, such as an MgO film, and a fluorescent substance layer are formed in the interior of a glass tube and a discharge gas consisting of Ne and Xe, for example, is filled in the glass tube. The fluorescent substance layer is formed on a supporting member called a boat, which is a mounted part having a sectional shape close to a semicircle, and this supporting member (boat) is inserted into the glass tube. After that, the glass tube is evacuated within a vacuum chamber while being heated and both ends of the glass tube are sealed after a discharge gas is filled. A large number of light-emitting lines thus fabricated are arrayed in parallel and fixed and electrodes are provided for these light-emitting lines. By applying a voltage to these electrodes, a discharge is generated in the interior of the light-emitting lines, whereby the fluorescent substance layer is caused to emit light.
FIG. 1 is a perspective view which shows the basic structure of a plasma tube array, which is an example of an array display apparatus.
In the plasma tube array (PTA) 100 shown here, light-emitting lines 10R, 10G, 10B, 10R, 10G, 10B, . . . , in which fluorescent substance layers generating respectively fluorescent light of the colors red (R), green (G) and blue (B) are disposed and a discharge gas is sealed, are arrayed parallel to each other and in a planar manner as a whole, and a transparent front surface supporting board 20 and a back surface supporting board 30 are disposed respectively on a display surface, which is a front surface, and a back surface of these many arrayed light-emitting lines 10R, 10G, 10B, 10R, 10G, 10B, . . . , with these many arrayed light-emitting lines 10R, 10G, 10B, 10R, 10G, 10B, . . . sandwiched between the front surface supporting board 20 and the back surface supporting board 30.
On the front surface supporting board 20 is formed a display electrode pair 21, which is constituted by two display electrodes 211, 212 extending parallel to each other in the array direction of the many light-emitting lines 10R, 10G, 10B, 10R, 10G, 10B, . . . , i.e., in a direction in which the display electrode pair 21 spans these many light-emitting lines 10R, 10G, 10B, 10R, 10G, 10B, . . . . This display electrode pair 21 is arrayed in multiple numbers in the longitudinal direction of the light-emitting lines 10R, 10G, 10B, 10R, 10G, 10B, . . . . The two display electrodes 211, 212 which constitute one display electrode pair 21 are constituted by bus electrodes 211a, 212a made of metal (for example, Cr/Cu/Cr), each formed on a side away from each other, and transparent electrodes 211b, 212b made from ITO thin films, each formed on a side close to each other. The bus electrodes 211a, 212a serve to lower the electric resistance of the display electrodes 211, 212, and the transparent electrodes 211b, 212b serve to ensure bright display by causing the luminous light in the light-emitting lines 10R, 10G, 10B, 10R, 10G, 10B, . . . to be transmitted to the front surface supporting board 20 side without intercepting the luminous light. The display electrode pair 21 is not limited to a transparent electrode and may be also constituted by an electrode of a structure having high aperture ratio, such as a mesh electrode.
On the back surface supporting board 30 are formed a large number of signal electrodes 31 made of metal which extend parallel to each other along each of the many arrayed light-emitting lines 10R, 10G, 10B, 10R, 10G, 10B, . . . in a manner corresponding to each of the light-emitting lines.
When the PTA 100 thus constructed is viewed in a planar manner, the part of intersection of the signal electrode 31 and the display electrode pair 21 becomes a unit light emission region (a unit discharge region). Display is performed by using one of the two display electrodes 211, 212 as a scanning electrode, selecting a light emission region by generating a selective discharge in the part of intersection of this scanning electrode and the signal electrode 31, and generating a display discharge between the display electrodes 211, 212 by use of a wall charge formed on the inner surface of the light-emitting line in the region due to the discharge. The selective discharge is an opposite discharge generated within a light-emitting line between the scanning electrode and the signal electrode 31, which are vertically opposite to each other, and the display electrode is a planar discharge generated within a light-emitting line between the display electrodes 211, 212 disposed parallel on a plane. Owing to this electrode arrangement, multiple light emission regions are formed within a light-emitting line in the longitudinal direction thereof.
FIG. 1 shows a structure in which three electrodes are disposed in one light emission region, and a display discharge is generated by the display electrodes 211, 212. However, the structure is not limited to this one and can be a display discharge generated between the display electrodes 211, 212 and the signal electrode 31. That is, it is possible to adopt an electrode structure of such a type that the display electrodes 211, 212 are formed as one electrode and by using this one display electrode as a scanning electrode, a selective discharge and a display discharge (an opposite discharge) are generated between this display electrode and a data electrode 3.
FIG. 2 is a schematic diagram which shows the structure of light-emitting lines constituting the PTA 100 shown in FIG. 1.
Three light-emitting lines 10R, 10G, 10B are shown here. In each of the light-emitting lines 10R, 10G, 10B, a protective film 12, such as an MgO, is formed on the inner surface of a glass tube 11, and within the glass tube 11 is inserted a boat 13, which is a supporting member in which fluorescent substance layers 14R, 14G, 14B generating fluorescent light of the colors R, G, B are formed (refer to the Japanese Patent Laid-Open No. 2003-86141).
FIG. 3 is a diagram which shows a boat on which a fluorescent substance layer is formed.
The boat 13 has a shape with a semicircular or U-shaped section or with a section similar to these sections, and also has a shape elongated long as with the glass tube 11 (refer to FIG. 2). On the inner side of the boat 13 are formed three kinds of fluorescent substance layers 14R, 14G, 14B (refer to FIG. 2; represented here by a fluorescent substance layer 14) corresponding to the three kinds of light-emitting lines 10R, 10G, 10B shown in FIGS. 1 and 2.
Again with reference to FIG. 2, the description will be continued.
Each of the light-emitting lines 10R, 10G, 10B shown in FIG. 2 is constructed by inserting the boat 13 having the shape shown in FIG. 3 into the glass tube 11. In FIG. 2, it is shown that a display electrode pair 21 constituted by two display electrodes 211, 212 is disposed on these light-emitting lines 10R, 10G, 10B. These two display electrodes 211, 212 are respectively constituted by bus electrodes 211a, 212a made of metal and transparent electrodes 211b, 212b. 
In the case of the structure shown in FIG. 2, the three light-emitting lines 10R, 10G, 10B which are respectively provided with the three kinds of fluorescent substance layers 14R, 14G, 14B constitute one set, and the region D1 defined by one set of display electrode pair 21 constituted by the two display electrodes 211, 212 becomes one pixel, which is the unit of color image display. The diameter of each of the light-emitting lines 10R, 10G, 10B is typically 1 mm or so, and hence in the case of the structure shown in FIG. 2, the size of the region D1 of one pixel becomes approximately 3 mm×3 mm.
FIG. 4 is a diagram which shows examples of display driving method in one frame period.
A subframe (SF) in which the periods of “initialization,” “address” and “display” constitute one set is aligned in multiple numbers. In the period of “initialization”, initialization is performed to make preparations for next light emission for each display pixel, in the next period of “address”, a display pixel which is to emit light is selected from display pixels which are two-dimensionally aligned in many numbers, and in the next period of “display”, the display pixel selected in the period of “address” immediately before this “display” period emits light.
The time length of the period of “display” differs from one SF to another, and depending on combinations of SFs in which light emission is to be performed from among these multiple SFs within one frame, the light emission luminance related to the “one frame” of the display pixel is determined. That is, on the basis of each pixel value of each display pixel within one frame, a light emission pattern is found for each display pixel as to which SF light is used for light emission and which SF light is not used for light emission, among the SFs which are aligned in multiple numbers within the one frame. Each display pixel emits light according to a light emission pattern for each display pixel. As a result of this, an image for one frame is displayed on the display screen.
Part (A) of FIG. 4 shows an example of one-mountain type arrayed SF structure. In this example, the time length of “display” is longest at the head within one frame and the more backward the position of an SF within one frame, the shorter the time. The time length of the “display” has such a shape that, so to speak, one mountain having a peak is formed at the head within the “one frame.”
Part (B) of FIG. 4 shows an example of two-mountain type arrayed SF structure. In this example, one frame is divided into a first half portion and a second half portion (the first half portion and the second half portion when one frame is divided like this are each called here a halfframe). For example, one frame having the same SF as arrayed within one frame of part (A) of FIG. 4 is divided into two halfframes (the first half portion and the second half portion). At this time, in each interior of each halfframe, the period of “display” of the SF at the head has the longest time and the more backward, the shorter the time. Therefore, the time length of the “display” has a peak at the head of each of the first half portion and the second half portion, so to speak, two mountains are formed within one frame.
Although there are various ideas about a display driving method other than these two examples, details of them are omitted here.
FIG. 5 is a block diagram of a plasma tube array and FIG. 6 is a function block diagram of a display circuit portion of the plasma tube array shown in FIG. 5.
FIG. 5 shows, as the component elements of the plasma tube array 100, a display circuit section 100B, which is constituted by a memory of conversion table of pixel value-light emission patterns 50a, a data control circuit 51, a driver control circuit 52, a signal electrode driver 53, a scanning electrode driver 54 and a common electrode driver 55, in addition to an image display section 100A in which light-emitting lines are arrayed and which has been described with reference to FIG. 1 to FIG. 3.
In this display circuit section 100B, processing for pixel value-light emission pattern conversion 61 and driving processing 62 are executed as shown in FIG. 6.
In processing for pixel value-light emission pattern conversion 61, for each pixel value, input image data is converted to a light emission pattern as to in which subframe (SF) light is emitted and in which subframe light is not emitted. In driving processing 62, the light emission of each pixel is controlled according to a light emission pattern obtained in the processing for pixel value-light emission pattern conversion 61.
In the circuit block shown in FIG. 5, the processing for pixel value-light emission pattern conversion 61 is performed by the memory of conversion table of pixel value-light emission patterns 50a and the data control circuit 51. That is, in the memory of conversion table of pixel value-light emission patterns 50a are stored pixel value-light emission conversion tables in which pixel values and light emission patterns are associated with each other, image data is inputted to the data control circuit 51 sequentially for each frame, and in the data control circuit 51, conversion tables of pixel value-light emission patterns are referred to, whereby the pixel value of each pixel in the image data for each frame is converted to a light emission pattern.
Data which represents light emission patterns thus obtained, along with the address information of pixels, is inputted to the driver control circuit 52.
The driving processing 62 shown in FIG. 6 is performed by the driver control circuit 52, the signal electrode driver 53, the scanning electrode driver 54 and the common electrode driver 55, which are shown in FIG. 5. The driver control circuit 52 receives the address information of each pixel and the light emission pattern data of each pixel, and in accordance with the received address information and data, the driver control circuit 52 controls the signal electrode driver 53 which drives the signal electrode 31, the scanning electrode driver 54 which drives each of the two display electrodes 211, 212 which constitute the display electrode pair 21, and the common electrode driver 55, thereby causing the image display section 100A in which light-emitting lines are aligned to display an image corresponding to the image data.
Incidentally, the driving processing 62 shown by a block in FIG. 6, i.e., the processing for displaying an image on the image display section 100A which is performed by the driver control circuit 52 shown in FIG. 5 by driving the three drivers (the signal electrode driver 53, the scanning electrode driver 54 and the common electrode driver 55) is a hitherto known technique, and because this driving processing is not a main subject here, a further description thereof is omitted.
In a PTA having a basic structure as described above, it is conceivable that a display surface on which images are displayed is formed as a curved surface by aligning light-emitting lines along the curved surface, and not in a planer manner.
For example, Japanese Patent Laid-Open No. 2003-92085 describes an example in which the whole area of the wall of a cylindrical room is a display surface.
By forming the display surface of a curved surface in this manner, it is possible to greatly increase the range of uses of a PTA.
Even in a case where a display surface is formed as a curved surface by arraying light-emitting lines so as to extend along the curved surface, there is no problem for a portion where the geometric environment of light-emitting lines is common to all light-emitting lines as in the case of the cylindrical arraying, which is shown in Japanese Patent Laid-Open No. 2003-92085. However, a problem occurs for a portion where the geometric environment differs from one light-emitting line to another.
FIG. 7 is a schematic diagram which shows multiple arrayed light-emitting lines. FIG. 8 is a schematic diagram which shows the array of the light-emitting lines 10 taken along the arrow A-A of FIG. 7. FIG. 9 is a schematic diagram which shows the array of the light-emitting lines 10 taken along the arrow B-B of FIG. 7.
The multiple light-emitting lines shown in FIG. 7 are arrayed in such a manner that part of the display region of a display surface forms a plane surface as shown in FIG. 8 and another part of the display region forms a curved surface as shown in FIG. 9 (in the example shown here, a convex surface having a positive curvature).
Two display electrodes 121, 122, which extend in the direction laterally intersecting these multiple light-emitting lines 10 are shown in FIG. 7. By applying a driving voltage to these two display electrodes 121, 122, a discharge is generated in the regions corresponding to the discharge slit between these two display electrodes 121, 122 within the light-emitting lines 10, with the result that light emission occurs. The surface of the front surface supporting board 20 in which these two display electrodes 121, 122 are formed is formed partially as a plane surface and partially as a curved surface according to the array of the light-emitting lines 10.
When multiple regions in different geometric environments are present on one display surface as in this example, display luminance differs from one region to another, posing the problem that nonuniformity in luminance occurs in terms of the whole area of the display surface.
That is, compared to the plane surface (zero curvature) shown in FIG. 8, in the case of a convex surface (positive curvature) as shown in FIG. 9, the width of a pixel for which one light-emitting line takes charge of light emission widens and light emission luminance per unit area decreases accordingly.
FIG. 10 is an explanatory diagram of a decrease rate of luminance.
Part (A) of FIG. 10 shows a display surface which is bent at a right angle by one light-emitting line. In this case, one light-emitting line at the corner has an angle of π/2 and when the radius of the light-emitting line is expressed by r, the area of the region in which only this light-emitting line takes partial charge of light emission widens by πr/2 in terms of length. In this case, the luminance of the portion at this corner decreases, for example, by about 44% compared to other plane surface portion.
Part (B) of FIG. 10 shows a display surface which is bent at a right angle through two light-emitting lines. In this case, the two light-emitting lines at the corner each have an angle of π/4 and the area of the region in which the two light-emitting lines take partial charge of light emission widens by πr/4 for each in terms of length. In this case, the luminance of the portion at this corner decreases, for example, by about 29% compared to other plane surface portion.
Part (C) of FIG. 10 shows a display surface which is bent at a right angle through three light-emitting lines. In this case, the three light-emitting lines at the corner each have an angle of π/6 and the area of the region in which the three light-emitting lines take partial charge of light emission widens by πr/6 for each in terms of length. In this case, the luminance of the portion at this corner decreases, for example, by about 17% compared to other plane surface portion.
Thus, the larger the curvature (Part (A) of FIG. 10 shows a large curvature and Part (C) of FIG. 10 shows a small curvature), the more the luminance decreases.
Although the description has been given here of a display surface which is a convex surface having a positive curvature, the same thing applies also to the case of a display surface which is a concave surface having a negative curvature. In the case of a display surface which is a concave surface, the larger the absolute value of the curvature, the more the luminance increases.